CD4011 Pinout
CD4011 Quad NAND Gate · CMOS quad 2-input NAND gate, supply 3–18V, a "universal gate".
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | Input | Gate 1 input A |
| 2 | 1B | Input | Gate 1 input B |
| 3 | 1Y | Output | Gate 1 output = NAND(1A,1B) |
| 4 | 2Y | Output | Gate 2 output |
| 5 | 2A | Input | Gate 2 input A |
| 6 | 2B | Input | Gate 2 input B |
| 7 | VSS · GND | GND | Ground |
| 8 | 3A | Input | Gate 3 input A |
| 9 | 3B | Input | Gate 3 input B |
| 10 | 3Y | Output | Gate 3 output |
| 11 | 4Y | Output | Gate 4 output |
| 12 | 4A | Input | Gate 4 input A |
| 13 | 4B | Input | Gate 4 input B |
| 14 | VDD | Power | Supply + (3–18V) |
How to read the CD4011 pinout
- 01
Find pin 1
One end of the chip has a half-circle notch or a dot; with the notch facing up, the top-left pin is pin 1.
- 02
Count counter-clockwise
Count counter-clockwise from pin 1: go down the left side first, then up the right side from the bottom.
- 03
Check the table below
Look up each pin's function by number in the table below; power/ground are color-coded, and alternate-function signals are in parentheses.
Frequently asked questions
Is the CD4011 the same as the 74HC00?
Both are quad NAND gates, but the CD4011 is 4000-series CMOS (supply 3–18V, slow) and the 74HC00 is high-speed CMOS (2–6V, much faster). Same pin layout.
How do I handle unused gates/inputs?
CMOS inputs must never float: tie unused inputs to VDD or VSS, otherwise they tend to oscillate, draw current, and produce undefined outputs.
Why is it called a "universal gate"?
Using only NAND gates you can build any logic such as AND/OR/NOT, hence it is called a universal (general-purpose) gate.
Pinout data comes from TI CD4011B datasheet (standard DIP-14 numbering). Refer to the actual device datasheet as authoritative for the pinout.