Primary Sources
Last updated: 2026-06-01
One of Circflow's hard rules: never type standard values from memory. All standard figures are either taken from the authoritative standards / official datasheets below, or generated by formula and then cross-checked against authoritative tables. The bottom of every tool page notes that tool's data source.
Main standards and sources cited
| Area | Standard / source | Use |
|---|---|---|
| E-series standard values | IEC 60063 | E6/E12/E24/E48/E96/E192 preferred numbers (segments that deviate from the formula, such as 27–47 and 82, are hard-coded per the standard). |
| Resistor / inductor color bands | IEC 60062 | Digit / multiplier / tolerance color codes (shared by resistor and inductor decoding). |
| Capacitor / SMD codes | IEC 60062 / EIA | Three-digit capacitor codes, SMD resistor E96 letter codes, etc. |
| PCB trace width | IPC-2221 (classic) | Internal/external current-vs-temperature-rise empirical formulas; refer to IPC-2152 for precise design. |
| Package dimensions | IPC-7351 / JEDEC | Dimension reference for common SMD packages (metric/imperial). |
| Logic level thresholds | JEDEC JESD8-A / 8-5 / 8-7 | LVTTL and LVCMOS 3.3/2.5/1.8V thresholds; TTL/74HC(T) taken from standard datasheets. |
| Fusing characteristics / blade fuses | IEC 60127 / SAE J1888 / ISO 8820 | FF/F/M/T/TT speed classes; blade fuse color ↔ current. |
| Circuit symbols | ANSI/IEEE Y32.2 · IEC 60617 | Schematic symbol conventions (differences between the U.S. and international sets are noted). |
| JTAG / SWD connectors | ARM CoreSight / Cortex Debug | Pin definitions for 10-pin (1.27mm) and 20-pin JTAG. |
| ESP32 GPIO | Espressif ESP32 Datasheet / TRM | Chip-level GPIO functions, strapping, ADC, input-only pins. |
| Arduino Uno | Arduino official / ATmega328P datasheet | Pin multiplexing (PWM/UART/SPI/I2C/interrupts). |
| USB / Ethernet wiring | USB-IF / TIA-568 | Pinouts for each USB generation, RJ45 T568A/B wiring order. |
| Floating-point representation | IEEE 754 | Single/double-precision bit-field breakdown. |
| Logic minimization | Quine–McCluskey · Petrick | Exact minimal algorithms for Karnaugh maps / Boolean simplification. |
Per-tool "verification cards"
Beyond this summary page, the logic module of every tool in the repository comes with a .sources.md verification card that records, item by item: the formulas/standards used, version numbers,
data sources, validation cases, and any edge cases "pending manual verification" (for example, items that vary by board/vendor, or are safety-sensitive and need confirmation against official electrical specs).
Accuracy and disclaimer
We do our best to keep figures accurate, but standards get revised and devices are governed by their datasheets. Results that involve physical hardware (trace width, current capacity, packages, pinouts, levels, etc.) are reference estimates; verify against the latest standards and device specs before going to production. See the Disclaimer for details.