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IC Pinouts / 74HC161

74HC161 Pinout

74HC161 4-bit Binary Counter · 4-bit synchronous binary counter with parallel load and asynchronous clear.

DIP-16 Counter 16 pins No backend · 100% client-side
MR(/MR) 1
CP(CLK) 2
D0 3
D1 4
D2 5
D3 6
CEP(ENP) 7
GND 8
74HC161 DIP-16
16 VCC
15 TC(RCO)
14 Q0
13 Q1
12 Q2
11 Q3
10 CET(ENT)
9 PE(/PE)
PowerGNDInputOutputI/OControl
PinNameTypeFunction
1 MR · /MR Control Master reset / clear (asynchronous, active-low)
2 CP · CLK Control Clock (counts on rising edge)
3 D0 Input Parallel data input 0 (LSB)
4 D1 Input Parallel data input 1
5 D2 Input Parallel data input 2
6 D3 Input Parallel data input 3 (MSB)
7 CEP · ENP Control Count enable P
8 GND GND Ground
9 PE · /PE Control Parallel-load enable (synchronous, active-low)
10 CET · ENT Control Count enable T (also gates TC)
11 Q3 Output Count output 3 (MSB)
12 Q2 Output Count output 2
13 Q1 Output Count output 1
14 Q0 Output Count output 0 (LSB)
15 TC · RCO Output Terminal count / ripple carry out (high at count 15)
16 VCC Power Supply + (2–6V)
How to · reading it

How to read the 74HC161 pinout

  1. 01

    Find pin 1

    One end of the chip has a half-circle notch or a dot; with the notch facing up, the top-left pin is pin 1.

  2. 02

    Count counter-clockwise

    Count counter-clockwise from pin 1: go down the left side first, then up the right side from the bottom.

  3. 03

    Check the table below

    Look up each pin's function by number in the table below; power/ground are color-coded, and alternate-function signals are in parentheses.

FAQ

Frequently asked questions

What is the difference between 74HC161 and 74HC163?

Same pinout and 4-bit binary counting, but 74HC161 has an ASYNCHRONOUS clear (/MR acts immediately), while 74HC163 has a SYNCHRONOUS clear (clears on the next clock edge).

How do I cascade two 74HC161 for an 8-bit counter?

Feed the first stage's TC into the next stage's CET (and tie CEP high). The upper counter then advances once per 16 counts of the lower one.

How do I make it count modulo-N (e.g. 0–9)?

Decode the count value and pull /MR low at N (async clear) or /PE low to reload 0 (synchronous). The synchronous reload avoids the brief glitch of async clear.

Data source

Pinout data comes from NXP/TI 74HC161 datasheet (standard DIP-16 numbering). Refer to the actual device datasheet as authoritative for the pinout.

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